Fujitsu adopts Cadence Encounter Timing System for timing signoff

Telecom Lead Asia: Fujitsu Semiconductor has adopted the
Cadence Encounter Timing System for timing signoff.

Utilizing Cadence technology, Fujitsu Semiconductor
solved 99 percent of hold violations after iteration through the ECO flow.

Fujitsu Semiconductor observed negligible impact to setup
time, and achieved better routability as compared to another vendor’s signoff

Cadence claims that Encounter Timing System delivered
comprehensive physically-aware, multi-mode, multi-corner (MMMC) analysis across
the design flow, engineering change orders (ECOs), and final signoff.

“Multi-mode, multi-corner timing analysis and
physically aware signoff timing optimization provide the key elements in fixing
the remaining timing violations at the final timing verification stage. We
expect the Cadence signoff solution, which includes these features, will drive
further timing closure efficiency improvements in our design flow,” said Akihiro
Yoshitake, vice president, SoC Design Engineering Division, IP & Technology
Development Unit at Fujitsu Semiconductor.

Cadence Encounter Timing System and QRC Extraction are
essential elements within the design implementation environment. The tight
integration between them improves timing convergence throughout the design flow
and greatly reduces time to design closure.

While traditional flows require a serial, multi-step
iterative process between physical implementation and signoff, the integrated signoff
technology inside the Cadence digital implementation flow enabled Fujitsu
Semiconductor to reduce the number of ECO loops due to deterministic placement
of new cells while optimizing performance and area for its large,
high-performance designs.

“At the latest advanced nodes, a comprehensive
multi-mode, multi-corner optimized design and signoff ECO flow is a must-have
to keep design schedules under control and to deliver superior results in
silicon,” said Chi-Ping Hsu, senior vice president, Silicon Realization
Group at Cadence.

“Encounter Timing System uniquely offers this
capability today and delivers a significant competitive advantage for our
users. We are pleased to be working closely with leading companies like Fujitsu
Semiconductor to help drive these exceptional time-to-market and
quality-of-silicon results,” Hsu added.

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