Data centers, which are key infrastructure in 5G mobile networks, are investigating speed upgrades from the current 100 GbE*3 to 400 GbE and future 800 GbE/1.6 TbE standards to support larger and faster transmissions.
PAM4*4 used in 400 GbE is easily affected by noise and transmission path losses, making it difficult to achieve the previous level of error-free transmissions and requiring use of FEC (Forward Error Correction*5) to correct generated errors and maintain transmission quality.
There is increasing need for quantitative measurement of jitter-related signal quality, such as jitter tolerance*6 measurement for evaluating the performance of high-speed devices and transceivers for 400-GbE.
Anritsu has added two new features to its MP1900A: the FEC symbol capture function to evaluate FEC-based network elements, and the PAM4 Bathtub*7 test capability to meet this need and support 400G network evolution.
The new MP1900A ED functions analyze the types of errors to evaluate whether or not the errors can be corrected by FEC and starts capturing data streams only when the burst errors exceed the FEC uncorrectable threshold. From the captured data, a user can determine and troubleshoot what kind of data steam caused the uncorrectable burst errors.
Anritsu has added the PAM4 Bathtub test capability to evaluate and quantify the jitter phase margin since the impact of jitter becomes severe as the data-stream baud rate is increased to achieve a higher traffic capacity.
The modular MP1900A running embedded Windows 10 has good expandability. It is a market-leading bit error rate tester (BERT) for various high-speed interfaces, including PCI Express Gen5 and USB4, using a full line of modules and application software. The MP1900A helps shorten development times for high-speed devices and transceivers.